WebPack

@CC		Title
ppt		Using a "FREE" Icarus Verilog Simulator ver 0.9.4 IEEE 1364-2005 std for Windows 7 either 32 or 64-bits OS.
	play	Spartan 3 & Nexys FPGA boards< --- TOOLS (VHDL), TOOLS (Verilog) -- What is an FPGA?
play		BASYS2 board
play	play1, play2 - part	Design overview for 4-bit Johnson ring counter
play	(play1 - part 1), (play2 - part 2), testing	Compiling and testing the 4-bit Johnson counter
		Simplified Excel Code for "BASYS2" UCF
		Simplified Excel Code for "Nexys2" UCF (500K gates ver 2.2)
		Simplified Excel Code for "Nexys2" UCF
play	(play1 - part 1) (play2 - part 2)	Using StateCAD and StateBench for Sequence 101 detector (PDF)
play	(play - part)	Using ModelSim to simulate result created by StateCAD and StateBench (PDF)
play	(play - part )	Simulation in ModelSim w/ user custom test Bencher
		3-bit counter, Z=1 if count value is 3. Uses Library Components. (PDF)
		Standard Component Designation. (Designation-PDF)
play	play - (part 1 - part 2)	Create JK out of a D flip flop with Debounce Button as Clock (PDF) --(PDF - on S3BOARD)
play	(play - part)	Mechanical Push Button Debouncer (PDF)
play		A light controlled by two switches (... using SILOS III in Step3.)
play		Proper Installation Procedure for SILOS Verilog simulator program (It works for 32 or 64-bit upto and including the current Windows 7 OS).